Template:Infobox CPU
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| Produced | {{#if:|From {{{produced-start}}} to {{{produced-end}}}|}} |
|---|---|
| Max. CPU clock rate | {{#if:|{{{slowest}}} GHz}} {{#if:| to {{{fastest}}} GHz}} |
| FSB speeds | {{#if:|{{{fsb-slowest}}} GHz}} {{#if:| to {{{fsb-fastest}}} GHz}} |
| HyperTransport speeds | {{#if:|{{{hypertransport-slowest}}} GT/s}} {{#if:| to {{{hypertransport-fastest}}} GT/s}} |
| QPI speeds | {{#if:|{{{qpi-slowest}}} GT/s}} {{#if:| to {{{qpi-fastest}}} GT/s}} |
| DMI speeds | {{#if:|{{{dmi-slowest}}} GT/s}} {{#if:| to {{{dmi-fastest}}} GT/s}} |
| Min. feature size | {{#if:| {{#if:| to {{{size-to}}}}}}} |
{{#ifeq:infobox cpu |doc
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This template is for CPUs. For generic hardware components, see Template:Infobox computer hardware.
|
[[File:{{{image}}}|{{{image_size}}}|alt={{{alt}}}|{{{alt}}}]] {{{caption}}} | |
| Produced | {{#if:{{{produced-end}}}|From {{{produced-start}}} to {{{produced-end}}}|{{{produced-start}}}}} |
|---|---|
| Marketed by | {{{soldby}}} |
| Designed by | {{{designfirm}}} |
| Common manufacturer(s) |
|
| Max. CPU clock rate | {{#if:{{{slowest}}}|{{{slowest}}} {{{slow-unit}}}}} {{#if:{{{fastest}}}| to {{{fastest}}} {{{fast-unit}}}}} |
| FSB speeds | {{#if:{{{fsb-slowest}}}|{{{fsb-slowest}}} {{{fsb-slow-unit}}}}} {{#if:{{{fsb-fastest}}}| to {{{fsb-fastest}}} {{{fsb-fast-unit}}}}} |
| HyperTransport speeds | {{#if:{{{hypertransport-slowest}}}|{{{hypertransport-slowest}}} {{{hypertransport-slow-unit}}}}} {{#if:{{{hypertransport-fastest}}}| to {{{hypertransport-fastest}}} {{{hypertransport-fast-unit}}}}} |
| QPI speeds | {{#if:{{{qpi-slowest}}}|{{{qpi-slowest}}} {{{qpi-slow-unit}}}}} {{#if:{{{qpi-fastest}}}| to {{{qpi-fastest}}} {{{qpi-fast-unit}}}}} |
| DMI speeds | {{#if:{{{dmi-slowest}}}|{{{dmi-slowest}}} {{{dmi-slow-unit}}}}} {{#if:{{{dmi-fastest}}}| to {{{dmi-fastest}}} {{{dmi-fast-unit}}}}} |
| Min. feature size | {{#if:{{{size-from}}}|{{{size-from}}} {{#if:{{{size-to}}}| to {{{size-to}}}}}}} |
| Instruction set | {{{arch}}} |
| Microarchitecture | {{{microarch}}} |
| CPUID code | {{{cpuid}}} |
| Product code | {{{code}}} |
| Cores | {{{numcores}}} |
| Core name(s) |
|
| L1 cache | {{{l1cache}}} |
| L2 cache | {{{l2cache}}} |
| L3 cache | {{{l3cache}}} |
| Model | {{{model}}} |
| Created | {{{created}}} |
| Transistors | {{{transistors}}} |
| Last level cache | {{{llcache}}} |
| Architecture | {{{arch1}}} |
| Instructions | {{{instructions}}} |
| Extensions |
|
| Socket | {{{socket}}} |
| Socket(s) |
|
| Predecessor | {{{predecessor}}} |
| Successor | {{{successor}}} |
| GPU | {{{gpu}}} |
| Application | {{{application}}} |
| Co-processor | {{{co-processor}}} |
| Package(s) |
|
| Product code name(s) |
|
| Brand name(s) |
|
| Variant | {{{variant}}} |
{{Infobox CPU
| name =
| image =
| image_size =
| caption =
| produced-start =
| produced-end =
| slowest =
| fastest =
| slow-unit =
| fast-unit =
| fsb-slowest =
| fsb-fastest =
| fsb-slow-unit =
| fsb-fast-unit =
| hypertransport-slowest =
| hypertransport-fastest =
| hypertransport-slow-unit =
| hypertransport-fast-unit =
| qpi-slowest =
| qpi-fastest =
| qpi-slow-unit =
| qpi-fast-unit =
| dmi-slowest =
| dmi-fastest =
| dmi-slow-unit =
| dmi-fast-unit =
| size-from =
| size-to =
| soldby =
| designfirm =
| manuf1 =
| core1 =
| sock1 =
| pack1 =
| brand1 =
| arch =
| microarch =
| instructions =
| extensions =
| data-width =
| address-width =
| virtual-width =
| cpuid =
| code =
| numcores =
| l1cache =
| l2cache =
| l3cache =
| l4cache =
| llcache =
| gpu =
| application =
| predecessor =
| successor =
| co-processor =
| variant =
| pcode =
}}
Usage
{{Infobox CPU
| name = Device Name
| image = An image to show in the infobox
| image_size = Size of the image (defaults to 200px)
| caption = A caption for the image
| produced-start = When production began
| produced-end = When production ended
| slowest = Lowest maximum CPU clock
| fastest = Highest maximum CPU clock
| slow-unit = Unit for slow speed. Default: GHz
| fast-unit = Unit for fast speed. Default: GHz
| fsb-slowest = Slowest FSB speed
| fsb-fastest = Fastest FSB speed
| fsb-slow-unit = Unit for slow speed. Default: MHz
| fsb-fast-unit = Unit for fast speed. Default: MHz
| hypertransport-slowest = Slowest HyperTransport speed
| hypertransport-fastest = Fastest HyperTransport speed
| hypertransport-slow-unit = Unit for slow speed. Default: GT/s
| hypertransport-fast-unit = Unit for fast speed. Default: GT/s
| qpi-slowest = Slowest QPI (QuickPath Interconnect) speed
| qpi-fastest = Fastest QPI speed
| qpi-slow-unit = Unit for slow speed. Default: GT/s
| qpi-fast-unit = Unit for fast speed. Default: GT/s
| dmi-slowest = Slowest DMI (Direct Media Interface) speed
| dmi-fastest = Fastest DMI speed
| dmi-slow-unit = Unit for slow speed. Default: GT/s
| dmi-fast-unit = Unit for fast speed. Default: GT/s
| size-from = Fabrication size
| size-to = Another fabrication size
| soldby = Often, but not always, the same as the designfirm and/or manuf1
| designfirm = Often, but not always, the same as manuf1 and/or soldby
| manuf1 = Common manufacturers of the device (1-5)
| core1 = Names of the cores (1-9)
| sock1 = Names of the sockets that the CPU was made for (1-9)
| pack1 = Names of CPU packages (1-5)
| brand1 = Marketing names of the CPU (1-9)
| arch = Instruction set architecture that the CPU implements
| microarch = Microarchitecture of the CPU
| instructions = Instruction Sets
| extensions = Extensions to the instructions
| data-width = Data bus width in bits
| address-width = Address bus width in bits
| virtual-width = Virtual address bus width in bits
| cpuid = CPUID or PVR value
| code = numerical identifier for the CPU (product code)
| numcores = Number of cores (2 for dual-core)
| l1cache = Level 1 cache size
| l2cache = Level 2 cache size
| l3cache = Level 3 cache size
| l4cache = Level 4 cache size
| llcache = Last Level cache size
| gpu = Integrated GPU
| application = Typical application (Embedded, Mobile, Desktop, Server)
| predecessor = What CPU came before
| successor = What CPU came after
| co-processor = A [[co-processor]](s) used together
| variant = Variants in the same family and generation
| pcode1 = Product code names
}}
All fields, except 'name' are optional
manuf, core, sock, pack, arch, and microarch are AutoLinks, so you can use plain text or a link for them.
The numbered attributes mean that there is allowance for multiples.
See the talk page for some examples which show the full usage of this infobox in a few combinations.
See also
{{#ifeq:Infobox CPU|sandbox|| }}
| The above documentation is transcluded from Template:Infobox CPU/doc. (edit | history) Editors can experiment in this template's sandbox (create | mirror) and testcases (create) pages. Please add categories to the /doc subpage. Subpages of this template. |